The present invention generally relates to a read only memory circuit, and in particular to a read only memory circuit in which information stored in a cell designated by an X address and a Y address is read out by precharging a bit line designated by the Y address and selecting a word line designated by the X address.
A read only memory (hereafter simply referred to as a ROM) circuit has been widely used in various electronic circuits. In general, a ROM circuit comprises a memory cell array composed of a number of cells, bit lines and word lines. When reading out information stored in a cell, a read address consisting of an X address and a Y address is provided with the ROM. One bit line designated by the supplied Y address is precharged to a predetermined potential (precharge potential). In this state, it is discriminated whether or not the designated bit line and one word line designated by the X address have been electrically coupled with each other by the diode connected therebetween in the forward direction, in other words it is discriminated whether or not the designated bit line is discharged by the designated word line via the diode. When the bit line is discharged and therefore its potential is changed to a predetermined discharge potential, it can be found that information has already been written in the cell, i.e., the cell is in a written state. Alternatively, when information has not been written in the cell, the bit line is not allowed to be discharged. That is, the bit line is maintained at the precharged potential. In the latter case, it may be considered that there is virtually no diode for making electrical contact between the designated bit line and the designated word line. In this manner, information stored in each of cells can be read out. This holds true for a programmable read only memory (hereafter referred to as a PROM).
However, the conventional ROM circuit has a disadvantage arising from an address skew. Each of the X and Y addresses is composed of a plurality of bits. The address skew causes some of the bits supplied to the ROM circuit to be delayed. When the address skew occurs, some cells in which information have already been written conduct transitionally or in an instance, and thereby charges are accumulated in semiconductor layers forming the cells. The charges accumulated in the semiconductor layers of the cells have a function of decreasing the speed in which information is read out therefrom.